numx numx
RV32IMFC RV64GC Any C99 toolchain

numx for RISC-V: Numerical Computing on the Open ISA

RISC-V is shipping in industrial sensors, medical devices, and wearables. The numerical computing tools have not caught up. numx does not care which ISA you are running.

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Zero architecture-specific code

numx contains no intrinsics, no inline assembly, no SIMD pragmas, and no architecture-specific headers. Every line is standard C99 that compiles identically on x86-64, ARM, RISC-V, AVR, and anything else with a C99 compiler.

The only architecture-dependent behavior is floating-point performance: hardware with an FPU (RV32IMFC and above) runs float operations in hardware; hardware without (RV32IM) runs them in software. numx produces correct results in both cases.

This means the same numx code that runs in your simulation on x86-64 runs unchanged on your RISC-V target. No porting layer. No conditional compilation. No surprises.

RV32IM Software float Correct, slower
RV32IMFC Hardware float32 Full speed float32
RV32IMFDC / RV64GC Hardware float64 Use -DNUMX_USE_DOUBLE=1

Building for RISC-V

Toolchain file

cmake 
# cmake/riscv32.cmake
set(CMAKE_SYSTEM_NAME Generic)
set(CMAKE_SYSTEM_PROCESSOR riscv)
set(CMAKE_C_COMPILER riscv32-unknown-elf-gcc)
set(CMAKE_C_FLAGS_INIT "-march=rv32imfc -mabi=ilp32f")
set(CMAKE_EXE_LINKER_FLAGS_INIT "-specs=nosys.specs")

Build

bash 
cmake -B build \
  -DCMAKE_TOOLCHAIN_FILE=cmake/riscv32.cmake \
  -DCMAKE_BUILD_TYPE=MinSizeRel \
  -DNUMX_BUILD_TESTS=OFF